Presenting UVVM at FPGA Conference Europe

EmLogic is one of the main contributors to FPGA Conference Europe this week with two presentations and two labs. One of each for beginners and experience users respectively.

We see this as a great opportunity to make even more FPGA and ASIC designers aware of UVVM – the worlds’s #1 VHDL verification methodology.

Check out the event information

Check out UVVM

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