Planned presentations++ on UVVM (or related), by EmLogic, in the near future

• • • 15 March 2023: ESA’s SEFUW conf. (ESTEC @ Noordwijk, The Netherlands): 
         ‘UVVM: A game changer for efficient FPGA verification and good FPGA quality’
    • 27 March 2023: Guest lecture at University of Oslo:
    •    1) The good, the bad and the ugly
         2) Design, verification and some general views on becoming a good FPGA or ASIC developer.
    • 27 March 2023: FPGA design and Verification course for NTNU’s Propulse and Orbit, Trondheim
      
    • 20 April 2023: Guest lecture at NTNU, Trondheim:
         1) Bugs and problems – Worst disasters
         2) Developing an FPGA module with a strong focus on efficiency, quality and modifiability
    • 4 May 2023: Webinar series for Aldec: ‘Enhancing the Simulation Testbench for VHDL-based FPGA designs‘
         ‘Part 1: Basic Testbench for a Simple DUT’
    • 1 June 2023: Webinar series for Aldec: ‘Enhancing the Simulation Testbench for VHDL-based FPGA designs‘
         ‘Part 2: Advanced Testbench for a Simple DUT’
    • 12-16 June 2023: Online course: ‘Advanced VHDL Verification – Made simple‘
    • 22 June 2023: Verification Futures (Reading, UK):
         ‘Speed up VHDL verification significantly by making a better testbench architecture and a simpler test sequencer‘
    •  4, 5 July 2023: FPGA Conference (Munich, DE): 
         1. Presentation: Good FPGA quality through efficient Verification – for beginners
         2. Presentation: Get the right FPGA quality through efficient Specification Coverage (aka Requirement Coverage)
         3. Demo: Making a structured VHDL testbench – for beginners
         4: Demo: Making a medium advanced testbench using verification components and high-level transactions, with a focus on ensuring proper Specification Coverage
    • 31 August 2023: Webinar series for Aldec: ‘Enhancing the Simulation Testbench for VHDL-based FPGA designs‘
          ‘Part 3: Advanced Testbench for a Complex DUT’
    • 12 September 2023: FPGAworld (Stockholm, SE)
         ‘Demo: Making a simple but structured VHDL testbench – for beginners’
    • 26 September 2023: FPGA Verification day 2923, (Live online)
         1. ‘Get the right FPGA quality through efficient Specification Coverage (aka Requirement Coverage)’
         2. ‘Demonstrated step-by-step tutorial on making a testbench for proper Specification Coverage (aka Requirement Coverage)’
    •  
    • and more are coming…