The same Author, Presenter and UVVM architect as always
EmLogic is continuing the courses on FPGA Design and Verification previously presented by Bitvis. Still Espen Tallaksen - but from a new company - as Bitvis no longer exists.
Upcoming courses
(Courses for 2023 will be set up soon)
Advanced VHDL Verification - Made simple
Course Info
Location: Live online
Date: 24 - 28 January 2022
Time of day: 08:30 - 13:00 CET
Registration deadline: 10. January
Registration fee: 2000 € *
* +VAT in Germany and some other countries
For more info on this course, go to course registration