The same Author, Presenter and UVVM architect as always
EmLogic is continuing the courses on FPGA Design and Verification previously presented by Bitvis. Still Espen Tallaksen - but from a new company - as Bitvis no longer exists.
Upcoming courses
Advanced VHDL Verification - Made simple
Course Info
Location: Live Online (Instructor led)
Date: Monday 22 April - Friday 26 April 2024
Time of day: 09:00 - 13:30 CEST
Registration deadline: 18 April - (limited number of seats)