Courses - EmLogic AS

Courses

The same Author, Presenter and UVVM architect as always

EmLogic is continuing the courses on FPGA Design and Verification previously presented by Bitvis. Still Espen Tallaksen - but from a new company - as Bitvis no longer exists.

Upcoming courses

Advanced VHDL Verification - Made simple

Course Info

Location: Live Online (Instructor led)
Date: Monday 22 April - Friday 26 April 2024
Time of day: 09:00 - 13:30 CEST
Registration deadline: 18 April - (limited number of seats)
Registration fee: 2200 € ^*
* +VAT in Germany and some other countries
See Course description HERE
Note that the course description says 3 days, but for online courses this is spread out on 5 half+ days.

Accelerating FPGA and Digital ASIC Design

Course Info

Location: Live Online (Instructor-led)
Monday 29 Jan - Thursday 1 Feb 2024
Time of day: 09:00 - 13:00 CET
Registration deadline: 15 January
Registration fee: 1500 € ^*
* +VAT in Germany and some othercountries
See Course description HERE
Note that the course description says 2 days, but for online courses this is spread out on 4 half days.

VHDL Verification

Advanced VHDL Verification - Made simple

COURSE INFO:

Location: Live Online (Instructor-led)
Date: Monday 22 April - Friday 26 April 2024
Time of day: 09:00 - 13:30 CET
Registration deadline: 18 April - (limited number of seats)
Registration fee: 2200 € ^*
* +VAT in Germany and some other countries (when registering via partners)
See Course description HERE
Note that the course description says 3 days, but for online courses this is spread out on 5 half+ days.

Course registration

FPGA & ASIC Design

Accelerating FPGA and Digital ASIC Design

Course Info:

Location: Live Online (Instructor-led)
Monday 29 Jan - Thursday 1 Feb. 2024
Time of day: 09:00 - 13:00 CET
Registration deadline: 15 January 2024
Registration fee: 1500 € ^*
* +VAT in Germany and some other countries (when registering via partners)
See Course description HERE
Note that the course description says 2 days, but for online courses this is spread out on 4 half days.

Course registration

VHDL Verification

Advanced VHDL Verification - Made simple

COURSE INFO:

Location: Live Online (Instructor-led)
Date: Monday 24 February - Friday 28 February 2025
Time of day: 09:00 - 13:30 CET
Registration deadline: 28 January
Registration fee: 2300 € ^*
* +VAT in Germany and some other countries (when registering via partners)
See Course description HERE
Note that the course description says 3 days, but for online courses this is spread out on 5 half+ days.

Course registration

FPGA & ASIC Design

Accelerating FPGA and Digital ASIC Design

Course Info:

Location: Live Online (Instructor-led)
Date: Monday 20 - Thursday 23 January 2025
Time of day: 09:00 - 13:00 CET
Registration deadline: 13 January 2025
Registration fee: 1500 € ^*
* +VAT in Germany and some other countries (when registering via partners)
See Course description HERE
Note that the course description says 2 days, but for online courses this is spread out on 4 half days.

Course registration

We provide courses on demand

We do both on-site and public courses (Verification, Design or both) worldwide on request. Given sufficient demand - we could arrange courses anywhere