EmLogic held a free webinar with a large international FPGA tool vendor
The four parts are independent of each other, but they all contain useful recommendations and hints on how to improve your development flow. Check them out here:
FPGA Design/Verification Best-Practices for Quality and Efficiency
Part 1: FPGA Design Architecture Optimization
FPGA Design/Verification Best-Practices for Quality and Efficiency
Part 2: FPGA Verification Architecture Optimization with UVVM
FPGA Design/Verification Best-Practices for Quality and Efficiency
Part 3: Randomization – The Why, When, What & How
FPGA Design/Verification Best-Practices for Quality and Efficiency
Part 4: Code, Functional and Specification Coverage