Our Courses

EmLogic is continuing the courses on FPGA Design and FPGA Verification previously presented by Bitvis. 
The same Author, – the same UVVM architect – and the same Presenter.

Next courses: 

  • Advanced VHDL Verification – Made simple:
    26-28 October 2021, Classrom in Germany (provided Covid-19 situation allows)
    See detailed course info ***here***
    See course overview below
  • Faster, Safer and more Structured FPGA Design (Accellerating FPGA Design): 
    10-11 November 2021, Classroom in Munich, Germany (provided Covid-19 situation allows)
    See detailed course info ***here***
    See course overview below

Courses on demand or request:

  • We do on-site courses (Design, Verification or both) world-wide on request
  • We do public courses  (Design or Verification) world-wide on request 
  • Given sufficient demand – we could arrange courses anywhere
  • Combinations of the above is also possible, and you could be a course facilitator in your area (given that is not already covered by one of our partners)
Send us your Registration, Request or Interest:
  • Register to info@emlogic.no and give the following information: Name, Company name, Company Address, Email, Mobile, – and if required by your company a Purchase order reference.
  • Send a request or your interest to info@emlogic.no and give the following information: Name, Company name, Company Address, and your request interest (preferred time, location, on-site vs public vs online, etc.

Munich, 26-28 October 2021.

Date 26-28 October
Time of day 9:00 – 17:00
Language English
Location Munich
Registration Fee 1850 € (+VAT in Germany and some other countries)
Course responsible Espen Tallaksen, EmLogic (Previously Bitvis), Mob: +47 93421277
Registration If you received an invitation to this course from one of our course partners, please register via them (unless you have been told otherwise).
Otherwise please register to info@emlogic.no and give the following information: Name, Company name, Company Address, Email, Mobile, – and if required by your company a Purchase order reference.
Deadline for registration Temporary deadline 30. September.
Note: “Seating” is limited, and priority will be given based on time of registration.

(The course may be cancelled if the Covid pandemic should require so)

See Description of course for more info on contents, agenda, etc.

Faster, Safer and more Structured FPGA Design

(Accellerating FPGA and Digital ASIC Design)

Munich, 10-11 November, 2021.

Date 10-11 November
Time of day 9:00 – 17:00
Language English
Location Munich 
Registration Fee 1250 € (+VAT in Germany and some other countries)
Course responsible Espen Tallaksen, EmLogic (Previously Bitvis), Mob: +47 93421277
Registration If you received an invitation to this course from one of our course partners, please register via them (unless you have been told otherwise).
Otherwise please register to info@emlogic.no and give the following information: Name, Company name, Company Address, Email, Mobile, – and if required by your company a Purchase order reference.
Deadline for registration Temporary deadline 20. October
Note: “Seating” is limited, and priority will be given based on time of registration.

(The course may be cancelled if the Covid pandemic should require so)

See Description of course for more info on contents, agenda, etc.